[<<] [<] Page 1 of 1 [>] [>>] | ||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||
Subject:
PIC interrupt driven usart driver
From: Michael Shiloh ####@####.#### Date: 30 Oct 1999 06:11:21 -0000 Message-Id: <199910300604.XAA03531@ktura.wrs.com> (sorry if this is a repeat; i'm not sure my earlier post got out.) hello, i'm writing an interrupt driven driver for the usart on a 16C63A, and i'm having some trouble. i first wrote the transmitter, and tested it by repeatedly spitting out some character. works fine. next i wrote the receiver, and tested it by echoing the received character out back out via the transmitter. in this case i use the transmitter in non-interrupt mode so that i don't get interrupted again right away. what i see are garbled characters. for every key i press, i get echoed back the wrong character. for a given key, it is always the same character e.g. if i press 'm' i always get 'i'. i can see no pattern, e.g. the mapping doesn't seem to be explained by a bit stuck one way or the other. one thing that occurred to me that i haven't tested yet, is that currently i copy the character directly out of the RCREG into the TXREG; tonight i'll try putting it in a temporary variable in between. if anyone else is interested, i would be more than happy to make the finished driver publicly available. also, does anyone know if Microchip makes a flash part with the same usart? i couldn't find one but i may have not seen it. i'm writing in C, using the C2C compiler, gpasm, on a linux platform. my C code follows, with the assembly listing below. any comments and suggestions will be appreciated. thanks, michael shiloh ####@####.#### - - - - - - - - 8< - - - - - cut here - - - - - - - - 8< - - - - - #define PORT_A_DIR 0x0 /* all are outputs */ #define PORT_B_DIR 0xf0 /* bits 7-4 are inputs */ #define PORT_C_DIR 0xc0 /* bits 7-6 must be set for usart mode*/ /* bits in the interrupt control register, INTCON */ #define t0if_bitmask 0x04 /* timer 0 interrupt flag bitmask */ /* bits in the peripheral interrupt register, PIR1 */ #define txif_bitnum 4 /* usart transmit interrupt flag bit number */ #define txif_bitmask 0x10 /* usart transmit interrupt flag bit mask */ #define rcif_bitnum 5 /* usart receive interrupt flag bit number */ #define rcif_bitmask 0x20 /* usart receive interrupt flag bit mask */ char TXSTA@0x98; char SPBRG@0x99; char RCSTA@0x18; char TXREG@0x19; char RCREG@0x1A; char PIR1@0x0C; char PIE1@0x8C; void interrupt( void ) { if (INTCON & t0if_bitmask) { /* perform whatever gets done here */ clear_bit( INTCON, T0IF ); //clear TMR0 overflow flag } if (PIR1 & txif_bitmask) { /* TXREG = 'm'; */ clear_bit( PIR1, txif_bitnum ); //clear transmit interrupt flag } if (PIR1 & rcif_bitmask) { TXREG = RCREG; clear_bit( PIR1, rcif_bitnum ); //clear receive interrupt flag } } main() { /* disable all interrupts */ disable_interrupt( GIE ); disable_interrupt(PEIE); disable_interrupt(T0IE); disable_interrupt(INTE); disable_interrupt(RBIE); disable_interrupt(T0IF); disable_interrupt(INTF); disable_interrupt(RBIF); set_bit( STATUS, RP0 ); /* bank 1 */ OPTION_REG = 0; SPBRG = 25; /* with BRGH = 0 and 4 Mhz xtal; 2400 baud */ clear_bit( TXSTA, BRGH ); /* low speed */ clear_bit( TXSTA, SYNC ); /* async mode */ set_bit( PIE1, TXIE); /* enable transmit interrupts */ clear_bit( PIE1, TXIE); /* DISenable transmit interrupts */ set_bit( PIE1, RCIE); /* enable receive interrupts */ set_tris_a( PORT_A_DIR ); set_tris_b( PORT_B_DIR ); set_tris_c( PORT_C_DIR ); clear_bit( STATUS, RP0 ); /* bank 0 */ output_port_a( 0 ); output_port_b( 0 ); output_port_c( 0 ); enable_interrupt( GIE ); enable_interrupt( T0IE ); /* enable TMR0 overflow bit */ enable_interrupt( PEIE ); /* enable peripheral interrupts */ set_bit (RCSTA, SPEN ); /* enable serial port */ set_bit (RCSTA, CREN); /* enable receiver */ set_bit( STATUS, RP0 ); set_bit (TXSTA, TXEN); /* enable transmitter */ clear_bit( STATUS, RP0 ); /* send out a start char, so i know we're alive */ TXREG = 'M'; while (1) { } } gpasm 0.0.7 alpha uartInter.asm9-29-1999 11:31:55 PAGE 1 Variables ***************************************** LOC OBJECT CODE LINE SOURCE TEXT VALUE 00001 ; This file was generated by C2C-plus compiler version 3.26e 00002 0000 00001 LIST 00002 ; P16C63A.INC Standard Header File, Version 1.00 Microchip Technology, Inc. 0000 00284 LIST 00003 include "/home/michaels/c2c30/h/p16c63.h" 00004 title "Variables *****************************************" 00000020 00005 __int_save_cont_W equ 0x20 00000021 00006 __int_save_cont_STATUS equ 0x21 00000098 00007 _TXSTA equ 0x98 00000099 00008 _SPBRG equ 0x99 00000018 00009 _RCSTA equ 0x18 00000019 00010 _TXREG equ 0x19 0000001A 00011 _RCREG equ 0x1a 0000000C 00012 _PIR1 equ 0x0c 0000008C 00013 _PIE1 equ 0x8c 0000 00014 ORG 0 0000 2817 00015 goto start__code 00016 0004 00017 ORG 4 0004 00018 _interrupt 0004 00019 _interrupt__code 0004 00A0 00020 movwf __int_save_cont_W 0005 0EA0 00021 swapf __int_save_cont_W, F 0006 0E03 00022 swapf STATUS, W 0007 00A1 00023 movwf __int_save_cont_STATUS 0008 1D0B 00024 btfss INTCON, 2 0009 280B 00025 goto label_0000 000A 110B 00026 bcf INTCON, T0IF 000B 00027 label_0000 000B 1E0C 00028 btfss _PIR1, 4 000C 280E 00029 goto label_0001 000D 120C 00030 bcf _PIR1, D'4' 000E 00031 label_0001 000E 1E8C 00032 btfss _PIR1, 5 000F 2813 00033 goto label_0002 0010 081A 00034 movf _RCREG, W 0011 0099 00035 movwf _TXREG 0012 128C 00036 bcf _PIR1, D'5' 0013 00037 label_0002 0013 0E21 00038 swapf __int_save_cont_STATUS, W 0014 0083 00039 movwf STATUS 0015 0E20 00040 swapf __int_save_cont_W, W 0016 0009 00041 retfie 0017 00042 _interrupt__end 00043 0017 00044 start__code 0017 00045 _main__code 0017 138B 00046 bcf INTCON, GIE 0018 130B 00047 bcf INTCON, PEIE 0019 128B 00048 bcf INTCON, T0IE 001A 120B 00049 bcf INTCON, INTE 001B 118B 00050 bcf INTCON, RBIE 001C 110B 00051 bcf INTCON, T0IF 001D 108B 00052 bcf INTCON, INTF gpasm 0.0.7 alpha uartInter.asm9-29-1999 11:31:55 PAGE 2 Variables ***************************************** 001E 100B 00053 bcf INTCON, RBIF 001F 1683 00054 bsf STATUS, RP0 0020 0181 00055 clrf OPTION_REG 0021 3019 00056 movlw D'25' 0022 0099 00057 movwf _SPBRG 0023 1118 00058 bcf _TXSTA, BRGH 0024 1218 00059 bcf _TXSTA, SYNC 0025 160C 00060 bsf _PIE1, TXIE 0026 120C 00061 bcf _PIE1, TXIE 0027 168C 00062 bsf _PIE1, RCIE 0028 3000 00063 movlw D'0' 0029 0085 00064 movwf TRISA 002A 30F0 00065 movlw D'240' 002B 0086 00066 movwf TRISB 002C 30C0 00067 movlw D'192' 002D 0087 00068 movwf TRISC 002E 1283 00069 bcf STATUS, RP0 002F 0185 00070 clrf PORTA 0030 0186 00071 clrf PORTB 0031 0187 00072 clrf PORTC 0032 178B 00073 bsf INTCON, GIE 0033 168B 00074 bsf INTCON, T0IE 0034 170B 00075 bsf INTCON, PEIE 0035 1798 00076 bsf _RCSTA, SPEN 0036 1618 00077 bsf _RCSTA, CREN 0037 1683 00078 bsf STATUS, RP0 0038 1698 00079 bsf _TXSTA, TXEN 0039 1283 00080 bcf STATUS, RP0 003A 304D 00081 movlw D'77' 003B 0099 00082 movwf _TXREG 003C 00083 label_0003 003C 283C 00084 goto label_0003 003D 00085 label_0004 003D 00086 _main__end gpasm 0.0.7 alpha uartInter.asm9-29-1999 11:31:55 PAGE 3 Variables ***************************************** SYMBOL TABLE LABEL VALUE BF 00000000 BRGH 00000002 C 00000000 CCP1CON 00000017 CCP1IE 00000002 CCP1IF 00000002 CCP1M0 00000000 CCP1M1 00000001 CCP1M2 00000002 CCP1M3 00000003 CCP1X 00000005 CCP1Y 00000004 CCP2CON 0000001D CCP2IE 00000000 CCP2IF 00000000 CCP2M0 00000000 CCP2M1 00000001 CCP2M2 00000002 CCP2M3 00000003 CCP2X 00000005 CCP2Y 00000004 CCPR1H 00000016 CCPR1L 00000015 CCPR2H 0000001C CCPR2L 0000001B CKP 00000004 CREN 00000004 CSRC 00000007 D 00000005 DATA_ADDRESS 00000005 DC 00000001 D_A 00000005 F 00000001 FERR 00000002 FSR 00000004 GIE 00000007 I2C_DATA 00000005 I2C_READ 00000002 I2C_START 00000003 I2C_STOP 00000004 INDF 00000000 INTCON 0000000B INTE 00000004 INTEDG 00000006 INTF 00000001 IRP 00000007 NOT_A 00000005 NOT_ADDRESS 00000005 NOT_BO 00000000 NOT_BOR 00000000 NOT_PD 00000003 NOT_POR 00000001 NOT_RBPU 00000007 NOT_RC8 00000006 gpasm 0.0.7 alpha uartInter.asm9-29-1999 11:31:55 PAGE 4 Variables ***************************************** NOT_T1SYNC 00000002 NOT_TO 00000004 NOT_TX8 00000006 NOT_W 00000002 NOT_WRITE 00000002 OERR 00000001 OPTION_REG 00000081 P 00000004 PCL 00000002 PCLATH 0000000A PCON 0000008E PEIE 00000006 PIE1 0000008C PIE2 0000008D PIR1 0000000C PIR2 0000000D PORTA 00000005 PORTB 00000006 PORTC 00000007 PR2 00000092 PS0 00000000 PS1 00000001 PS2 00000002 PSA 00000003 R 00000002 RBIE 00000003 RBIF 00000000 RC8_9 00000006 RC9 00000006 RCD8 00000000 RCIE 00000005 RCIF 00000005 RCREG 0000001A RCSTA 00000018 READ_WRITE 00000002 RP0 00000005 RP1 00000006 RX9 00000006 RX9D 00000000 R_W 00000002 S 00000003 SPBRG 00000099 SPEN 00000007 SREN 00000005 SSPADD 00000093 SSPBUF 00000013 SSPCON 00000014 SSPEN 00000005 SSPIE 00000003 SSPIF 00000003 SSPM0 00000000 SSPM1 00000001 SSPM2 00000002 SSPM3 00000003 SSPOV 00000006 SSPSTAT 00000094 STATUS 00000003 SYNC 00000004 T0CS 00000005 gpasm 0.0.7 alpha uartInter.asm9-29-1999 11:31:55 PAGE 5 Variables ***************************************** T0IE 00000005 T0IF 00000002 T0SE 00000004 T1CKPS0 00000004 T1CKPS1 00000005 T1CON 00000010 T1INSYNC 00000002 T1OSCEN 00000003 T2CKPS0 00000000 T2CKPS1 00000001 T2CON 00000012 TMR0 00000001 TMR1CS 00000001 TMR1H 0000000F TMR1IE 00000000 TMR1IF 00000000 TMR1L 0000000E TMR1ON 00000000 TMR2 00000011 TMR2IE 00000001 TMR2IF 00000001 TMR2ON 00000002 TOUTPS0 00000003 TOUTPS1 00000004 TOUTPS2 00000005 TOUTPS3 00000006 TRISA 00000085 TRISB 00000086 TRISC 00000087 TRMT 00000001 TX8_9 00000006 TX9 00000006 TX9D 00000000 TXD8 00000000 TXEN 00000005 TXIE 00000004 TXIF 00000004 TXREG 00000019 TXSTA 00000098 UA 00000001 W 00000000 WCOL 00000007 Z 00000002 _BODEN_OFF 00003FBF _BODEN_ON 00003FFF _CP_50 00002AEF _CP_75 000015DF _CP_ALL 000000CF _CP_OFF 00003FFF _HS_OSC 00003FFE _LP_OSC 00003FFC _PIE1 0000008C _PIR1 0000000C _PWRTE_OFF 00003FFF _PWRTE_ON 00003FF7 _RCREG 0000001A _RCSTA 00000018 _RC_OSC 00003FFF _SPBRG 00000099 gpasm 0.0.7 alpha uartInter.asm9-29-1999 11:31:55 PAGE 6 Variables ***************************************** _TXREG 00000019 _TXSTA 00000098 _WDT_OFF 00003FFB _WDT_ON 00003FFF _XT_OSC 00003FFD __int_save_cont_STATUS 00000021 __int_save_cont_W 00000020 _interrupt 00000004 _interrupt__code 00000004 _interrupt__end 00000017 _main__code 00000017 _main__end 0000003D label_0000 0000000B label_0001 0000000E label_0002 00000013 label_0003 0000003C label_0004 0000003D start__code 00000017 Errors : 0 Warnings : 0 Messages : 0 | ||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||
Subject:
Re: PIC interrupt driven usart driver
From: Scott Dattalo ####@####.#### Date: 30 Oct 1999 14:06:44 -0000 Message-Id: <Pine.GSO.3.95q.991030064049.20926A-100000@unix.sri.com> On Fri, 29 Oct 1999, Michael Shiloh wrote: > (sorry if this is a repeat; i'm not sure my earlier post got out.) (I didn't get it). Michael, I took a brief look at your code and did not see anything wrong (which is not to say there is isn't). The only reason I'm responding to your question is to tell you that I've been working on the USART peripheral in gpsim. Right now I've got the USART working in asynchronous mode with out interrupts for the 18cxxx family. Fortunately, the USART module for the 18cxxx family is nearly identical to the USART of the 14-bit core devices. So the good news is that it wouldn't be too hard to include it in the 14-bit core, the bad news is that I wasn't planning to do it before releasing version 17. BTW, the next release of gpsim will be with in two weeks and will have the major feature that you privately requested: a cli only mode. (There are also many other features which I'll outline when the release is made). Hint: Try loop-back cables for debugging your rs-232. i.e. tie tx to rx and make sure that the pc and the pic can (independently) receive and transmit. Regards, Scott | ||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||
Subject:
Re: PIC interrupt driven usart driver
From: Alex Holden ####@####.#### Date: 30 Oct 1999 14:20:31 -0000 Message-Id: <Pine.LNX.4.04.9910301502550.512-100000@hyperspace> On Sat, 30 Oct 1999, Scott Dattalo wrote: > > (sorry if this is a repeat; i'm not sure my earlier post got out.) > (I didn't get it). The problem was that he sent the mail to the address of the old list, so ezmlm refused to resend it because the mailing list's address wasn't in the To: or CC: field. Could whoever maintains the website please make sure they update the mailing list details please... Thanks, Alex. --------------- Linux- the choice of a GNU generation. -------------- : Alex Holden (M1CJD)- Caver, Programmer, Land Rover nut, Radio Ham : -------------------- http://www.linuxhacker.org/ -------------------- | ||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||
Subject:
Re: PIC interrupt driven usart driver
From: Michael Shiloh ####@####.#### Date: 30 Oct 1999 18:53:07 -0000 Message-Id: <199910301846.LAA04339@ktura.wrs.com> Hi Scott, Nice to hear from you. >Michael, > >I took a brief look at your code and did not see anything wrong (which is >not to say there is isn't). The only reason I'm responding to your >question is to tell you that I've been working on the USART peripheral in >gpsim. Right now I've got the USART working in asynchronous mode with out >interrupts for the 18cxxx family. Fortunately, the USART module for the >18cxxx family is nearly identical to the USART of the 14-bit core devices. >So the good news is that it wouldn't be too hard to include it in the >14-bit core, the bad news is that I wasn't planning to do it before >releasing version 17. BTW, the next release of gpsim will be with in two >weeks and will have the major feature that you privately requested: a cli >only mode. (There are also many other features which I'll outline when the >release is made). Very cool! Now I have to figure out why gpsim is crashing on my machine.... >Hint: >Try loop-back cables for debugging your rs-232. i.e. tie tx to rx and make >sure that the pc and the pic can (independently) receive and transmit. Tried that on my dumb terminal (not a PC) and that end is fine. I will try it on the PIC (send char, receive char, compare, flash one LED if match, flash another LED if no match). Thanks for the suggestions. Michael | ||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||
Subject:
Re: PIC interrupt driven usart driver
From: Eric Smith ####@####.#### Date: 31 Oct 1999 02:49:11 -0000 Message-Id: <19991031022238.29217.qmail@brouhaha.com> > i'm writing an interrupt driven driver for the usart on > a 16C63A, and i'm having some trouble. I regret that I don't have time to study your code, but I have some sample code with interrupt-driven serial routines using circular buffers: http://www.brouhaha.com/~eric/pic/uarttest.html > also, does anyone know if Microchip makes a flash part with the > same usart? i couldn't find one but i may have not seen it. PIC16F876, 877 By the way, this stuff is arguably off-topic for gnupic. But given how bad PICLIST has gotten, I guess I shouldn't complain. | ||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||
[<<] [<] Page 1 of 1 [>] [>>] |