gnupic: gplogic was Re: gpsim
Subject:
gplogic was Re: gpsim
From:
Scott Dattalo ####@####.####
Date:
11 Oct 2000 03:11:49 -0000
Message-Id: <Pine.LNX.4.21.0010102133560.23487-100000@tempest2.blackhat.net>
In a message to Ralf and me,
On Tue, 10 Oct 2000, Timo Ketola wrote:
> Hi,
>
> As you have created such a great tool as gpsim I thought you might be
> interested in other PIC tools as well. I wrote a little code generator
> for klogic and PIC. It is not very useful yet but still generates
> working code for AND and OR gates. I have no real target for PIC so
> thats where your gpsim gets into the picture.
> You can get the gplogic it from
> http://kauhajoki.fi/~tketola/files/gplogic.tar.gz (or
> ftp://kauhajoki.fi/home/pri/tketola/public_html/files/gplogic.tar.gz).
>
> I'd like to know what you think about gplogic and whether you are
> interested in helping to make an interface between gpsim and klogic (my
> goal is to be able to debug live with klogic and gpsim target or real
> target) when time comes...
>
> Timo
>
Timo,
I hope you don't mind that I posted this to the gnupic mailing list.
First, I didn't know what klogic was:
http://www.a-rostin.de/klogic/
Interesting. It appears that your code can take the klogic netlist output and
generate pic code. Neat.
As you may be aware, gpsim now provides the hooks for a module interface. This
allows gpsim to encompass devices other than pics in the simulation. So
certainly this would be a good way for you to interface gpsim with klogic. In
fact, the first simple library module I created to test the module interface
consisted of a AND and OR gates.
But this only solves half of your problem. Since you're generating pic code, I
presume your asking a way in which gpsim may be used to test it? Certainly you
could manually step through the code and verify that the AND's, OR's, and FF's
are doing what they're supposed to do, but that would be very tedious. However,
using the module interface, you could stimulate the simulated pic running your
code and watch for the expected response. For example, you may map two PIC
inputs and one output to a simulated AND gate, change the inputs to a logic high
and watch the output swing high. All of the infrastructure is already in place
to accomodate this. Or you could write code that describes the behavior of the
logic and then compare the behavior model to the synthesized/simulated model.
Part of the reason I posted the response to the list was to perhaps get someone
else interested in helping you with the interface. I certainly am available to
improve upon the infrastructure and answer questions. One thing lacking about
the module interface is documentation. You're forced to sift through the
examples I've written if you want to implement a custom interface. Hopefully
this problem will get fixed over time.
Scott
